New Many-Core design with Message Passing: Intel SCC

Intel recently launched a new experimental architecture, the Intel ® SCC. This new architecture was designed to overcome the issue of coherence by introducing message passing to an on-chip many-core architecture design. We observe that this will re-introduce the design issue of programmability. Just like with the message passing programming model, it exposes all the details of synchronization to the programmer, at the cost of an increase in programming complexity. The goals of this project are thus to:

• Design and evaluate a better programming model for the Intel® SCC.
• Add efficient abstractions to enhance overall programmability.

Resources

• How to collect power statistics on Intel SCC link
  First version: contributed by Yu-Liang Chou